Struct hal_x86_64::cpu::msr::Msr
source · pub struct Msr<V = u64> { /* private fields */ }
Expand description
An x86_64 Model-Specific Register (MSR).
Model-specific registers are used to configure features of the CPU that may
not be available on all x86 processors, such as memory type-range,
sysenter/sysexit, local APIC, et cetera. MSRs are available on P6 and later
x86 processors (and are present on all 64-bit x86 CPUs). The
Msr::has_msrs
method can be used to check if the CPU has MSRs. Note
that this method does not check whether a particular MSR is available.
See sandpile.org’s MSR list for a list of documented MSRs and their values.
Typed MSRs
MSRs may be accessed as raw u64
values (using Msr::read_raw
and
Msr::write_raw
), or may be constructed with a type parameter
implementing the [mycelium_util::bits::FromBits
] trait, which is
automatically converted to and from its binary representation when
reading/writing to the MSR.
When a typed representation of a MSR’s value is available, a special constructor is provided for accessing that MSR in a typed manner.
MSR Constructors
This type provides a number of constructors which construct a Msr
for
accessing a specific model-specific register by name. The following
constructors are currently provided:
-
Msr::ia32_apic_base
for accessing theIA32_APIC_BASE
MSR, which stores the base address of the local APIC’s memory-mapped configuration area. -
Msr::ia32_gs_base
for accessing theIA32_GS_BASE
MSR, which stores the base address of theGS
segment. -
Msr::ia32_efer
for accessing the Extended Flags Enable Register (EFER), which contains flags for enabling long mode and controlling long-mode-specific features.Flags for the
IA32_EFER
MSR are represented by theEfer
type.
Implementations§
source§impl Msr
impl Msr
sourcepub fn has_msrs() -> bool
pub fn has_msrs() -> bool
Returns true
if this processor has MSRs.
Notes
This does not check whether the given MSR number is valid on this platform.
sourcepub fn try_new(num: u32) -> Option<Self>
pub fn try_new(num: u32) -> Option<Self>
Returns a new Msr
for reading/writing to the given MSR number, or
None
if this CPU does not support MSRs.
Notes
This does not check whether the given MSR number is valid on this platform.
sourcepub const fn ia32_apic_base() -> Self
pub const fn ia32_apic_base() -> Self
Returns a Msr
for reading and writing to the IA32_APIC_BASE
model-specific register.
This register has MSR number 0x1B, and stores the base address of the local APIC memory-mapped configuration area.
sourcepub const fn ia32_gs_base() -> Self
pub const fn ia32_gs_base() -> Self
Returns a Msr
for reading and writing to the IA32_GS_BASE
model-specific register.
This register has MSR number 0xC0000101, and contains the base address
of the GS
segment.
sourcepub const fn ia32_efer() -> Msr<Efer>
pub const fn ia32_efer() -> Msr<Efer>
Returns a Msr
for reading and writing to the IA32_EFER
(Extended
Flags Enable Register) MSR.
The EFER register has MSR number 0xC0000080, and contains flags for
enabling the SYSCALL
and SYSRET
instructions, and for entering and
exiting long mode, and for enabling features related to long mode.
Flags for the IA32_EFER
MSR are represented by the Efer
type.
source§impl<V: FromBits<u64>> Msr<V>
impl<V: FromBits<u64>> Msr<V>
sourcepub fn try_read(self) -> Result<V, V::Error>
pub fn try_read(self) -> Result<V, V::Error>
Attempt to read a V
-typed value from the MSR, returning an error if
that value is an invalid bit pattern for a V
-typed value.
Returns
sourcepub fn read(self) -> V
pub fn read(self) -> V
Read a V
-typed value from the MSR.
Panics
If the bits in the MSR are an invalid bit pattern for a V
-typed value
(as determined by V
’s implementation of the
[FromBits::try_from_bits
]) method).
sourcepub unsafe fn write(self, value: V)
pub unsafe fn write(self, value: V)
Write a value to this MSR.
Safety
The caller is responsible for ensuring that writing the provided value to this MSR doesn’t violate memory safety.
sourcepub unsafe fn update(self, f: impl FnOnce(V) -> V)
pub unsafe fn update(self, f: impl FnOnce(V) -> V)
Read this MSR’s current value, modify it using a closure, and write back the modified value.
This is a convenience method for cases where some bits in a MSR should be changed while leaving other values in place.
Safety
The caller is responsible for ensuring that writing the provided value to this MSR doesn’t violate memory safety.